The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a method and device for manufacturing a highly integrated circuit device having an improved trench isolation structure. Merely by way of example, the invention has been applied to advanced integrated circuit devices having a feature size of less than 0.13 micron. But it would be recognized that the invention has a much broader range of applicability. For example, the invention can be applied to other feature sizes, which are even smaller, e.g., 0.11 micron, 0.09 micron.
Integrated circuits or “ICs”have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of ICs. Semiconductor devices are now being fabricated with features less than a quarter of a micron across.
Increasing circuit density has not only improved the complexity and performance of ICs but has also provided lower cost parts to the consumer. An IC fabrication facility can cost hundreds of millions, or even billions, of dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of ICs on it. Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as each process used in IC fabrication has a limit. That is to say, a given process typically only works down to a certain feature size, and then either the process or the device layout needs to be changed. An example of such a limit is the ability to form smaller and improved isolation structures. Isolation structures have been difficult for form and have evolved through the years.
As merely an example, conventional isolation structures include local oxidation of silicon, commonly called LOCOS. LOCOS has been effective through the years but is being replaced by trench isolation structures. Such trench isolation structures have been used for device having critical sizes of less than a predetermined dimension. Trench isolation has replaced, in part, LOCOS for advanced semiconductor devices. Although trench isolation has been effective, numerous limitations still exist. Such limitations have been described throughout the present specification and more particularly below.
From the above, it is seen that an improved technique for processing semiconductor devices including photo masks is desired.